Technology

40G QSFP+ LR4 Transceiver Hardware Design Solution

Firstly, combined with the working principle of the 40G QSFP+ LR4 transceiver, this paper gives its overall design scheme. Next, according to different functions, the transceiver hardware is divided into four sub transceivers: transmitting part, receiving part and control part, and they are analyzed in detail.

40G QSFP+ LR4 Transceiver Working Principle & Design

40G QSFP+ LR4 transceiver adopts a full duplex working mode. It integrates the transmitting and receiving channels in one transceiver. At the sending end, four 10Gbps serial data streams are sent to the driver chip. The driving chip controls the direct modulation laser (DML). The working wavelengths of the laser are 1271nm, 1291nm, 1311nm and 1331nm. The optical signals output by four DMLS are loaded into a single-mode fiber through an optical multiplexer and an LC connector. At the receiving end, four 10Gbps optical signals flow through the optical demultiplexer to four channels. The optical signal flow of each channel passes through the PIN photodetector / transimpedance amplifier and is output through the limiting amplifier.

The transceiver supports hot plug, digital diagnosis and low power consumption mode. According to the function division, the whole hardware part can usually be divided into four parts, including the electrical interface part, transmitting part, receiving part and control part. The overall design scheme is shown in the figure below.

40G QSFP+ LR4 Transceiver Working Diagram

Transmitting Part

The transmitting part includes 4 channels based on CWDM band ×10G TOSA and on-board driving circuit for loading driving signal to TOSA. It is responsible for receiving four 10 Gbps data signals from the motherboard and loading the electrical signals into the four bands of 1271nm, 1291nm, 1311nm and 1331nm of TOSA through direct modulation. Each band of optical signal is loaded with a 10G electrical signal.

Receiving Part

The function of the receiving part is to receive the 40G optical signal from the optical fiber link and convert it into an identifiable digital signal through amplification, integer and regeneration. A complete receiving part usually includes photodetector, preamplifier and limiting amplifier (LA). The photoelectric monitor changes the optical signal from the link into a weak current signal. The current signal is converted into voltage signal by a preamplifier. At present, the main preamplifier is transimpedance amplifier (TIA). The signal amplified by TIA is still a continuously changing analog signal, which needs to be integer and regenerated into digital signal by LA.

Control Part

The control part of the 40Gbase-lr4 transceiver studied in this paper adopts C8051F390 single chip microcomputer of Silicon Labs company. The chip adopts high-speed 8051μ The C core can execute 70% of the instructions in one or two system clocks, has a throughput of 25 MIPS at a clock frequency of 25 MH, and internally provides 768 bytes of ram and 16kb of storage space. It provides 21 I/O ports, accessed by I2C bus, and has one programmable 16 bit count/timer and four general 16 bit count/timers. The TIA configuration and four driver chip configuration information in the receiving Rosa will be stored in the MCU. At the same time, the memory space about voltage, bias current, received optical power and some related status bits required in the QSFP+ multi-source protocol inf-8438i will also be configured in the MCU. The 21 I/O ports in C8051F339 are used to read out the status of the corresponding functions of the chip and realize the access to specific ports. The detailed definition of MCU I/O ports is shown in the figure below.

 Control Part Interface Design Diagram

Conclusion

The paper above introduces the working principle of the 40G QSFP+ LR4 transceiver and the hardware design of transmitting, receiving and control of the transceiver in detail. QSFPTEK is an original brand of fiber optic transceiver factory outlet that serves SMB users. Besides the 40G QSFP+ LR4 transceiver, QSFPTEK also provides high-quality and high-reliable 40G QSFP+ SR4, 40G QSFP+ ER4, and etc with industry-leading hardware optical components. Welcome to consult via [email protected].

Christopher Stern

Christopher Stern is a Washington-based reporter. Chris spent many years covering tech policy as a business reporter for renowned publications. He has extensive experience covering Congress, the Federal Communications Commission, and the Federal Trade Commissions. He is a graduate of Middlebury College. Email:[email protected]

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